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ARCHITECTURE Datasheet, PDF

Search Description : 'ARCHITECTURE' - Total: 510 (1/26) Pages
Electronic ManufacturerPart NumberDatasheetElectronics Description

Cypress Semiconductor
CY7C1422AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1370DV25_06 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL™ Architecture
CY7C1353G 4-Mbit (256K x 18) Flow-through SRAM with NoBL™ Architecture
CY7C1350B 128Kx36 Pipelined SRAM with NoBL Architecture
CY7C1310AV18 18-Mb QDR-II SRAM 2-Word Burst Architecture
CY7C1371D 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture
CY7C1354A 256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture
CY7C1231F 2-Mbit (128K x 18) Flow-through SRAM with NoBL Architecture
CY7C1310BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1370D 18-Mbit (512K X 36/1M X 18) Pipelined SRAM with NoBL Architecture
CY7C15632KV18 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)

Level One
HVE-6601T Multicasting and broadcasting architecture

Cypress Semiconductor
CY7C11661KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1411AV18_09 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1323BV25 18-Mbit 4-Word Burst SRAM with DDR-I Architecture
CY7C1517V18 72-Mbit DDR-II SRAM 4-Word Burst Architecture
CY7C1510AV18 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture

ATMEL Corporation
ATMEGA48PB Advanced RISC architecture

Integrated Device Techn...
89HPES32T8G2 Low latency cut-through architecture

Elite Semiconductor Mem...
M13L32321A-2G Double-data-rate architecture, two data transfers per clock cycle

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