DOUBLE-DATA-RATE ARCHITECTURE, TWO DATA TRANSFERS PER CLOCK CYCLE Datasheet(PDF) - M13S128324A-2M - Elite Semiconductor Memory Technology Inc.

Elite Semiconductor Mem...

M13S128324A-2M

1Mb/48P

Double-data-rate architecture, two data transfers per clock cycle

M13S2561616A-2S

1Mb/49P

Double-data-rate architecture, two data transfers per clock cycle

M13S5121632A-2S

705Kb/48P

Double-data-rate architecture, two data transfers per clock cycle

M13S2561616A-2A

1Mb/49P

Double-data-rate architecture, two data transfers per clock cycle

Winbond

W9412G2IB4

832Kb/50P

Double data Rate architecture; two data transfers per clock cycle

W9412G6JH-5

1Mb/53P

Double data Rate architecture; two data transfers per clock cycle

W9751G6KB-25

1Mb/87P

Double data Rate architecture: two data transfers per clock cycle

Elite Semiconductor Mem...

M13L32321A-2G

1Mb/48P

Double-data-rate architecture, two data transfers per clock cycle

Winbond

W631GG6KB-15

3Mb/158P

Double data Rate architecture: two data transfers per clock cycle

Elite Semiconductor Mem...

M13L2561616A-2A

1Mb/49P

Double-data-rate architecture, two data transfers per clock cycle

Winbond

W972GG6JB-25

1Mb/87P

Double data Rate architecture: two data transfers per clock cycle

W9725G6JB25I

1Mb/86P

Double data Rate architecture: two data transfers per clock cycle

Elite Semiconductor Mem...

M13S64164A-2Y

1Mb/49P

Double-data-rate architecture, two data transfers per clock cycle

M13S128168A-2N

720Kb/49P

Double-data-rate architecture, two data transfers per clock cycle

M14D128168A

786Kb/59P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

M14D5121632A-2K

753Kb/64P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

M14D1G1664A-2D

724Kb/64P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

M14D1G1664A-2S

707Kb/65P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

M14D2561616A-2E

1Mb/61P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

M14D128168A-2M

1,023Kb/59P

Internal pipelined Double-data-rate architecture; two data access per clock cycle

DOUBLE-DATA-RATE ARCHITECTURE, TWO DATA TRANSFERS PER CLOCK CYCLE Datasheet, PDF

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Manufacturer	Part #	Datasheet	Description
Elite Semiconductor Mem...	M13S128324A-2M	1Mb/48P	Double-data-rate architecture, two data transfers per clock cycle
	M13S2561616A-2S	1Mb/49P	Double-data-rate architecture, two data transfers per clock cycle
	M13S5121632A-2S	705Kb/48P	Double-data-rate architecture, two data transfers per clock cycle
	M13S2561616A-2A	1Mb/49P	Double-data-rate architecture, two data transfers per clock cycle
Winbond	W9412G2IB4	832Kb/50P	Double data Rate architecture; two data transfers per clock cycle
	W9412G6JH-5	1Mb/53P	Double data Rate architecture; two data transfers per clock cycle
	W9751G6KB-25	1Mb/87P	Double data Rate architecture: two data transfers per clock cycle
Elite Semiconductor Mem...	M13L32321A-2G	1Mb/48P	Double-data-rate architecture, two data transfers per clock cycle
Winbond	W631GG6KB-15	3Mb/158P	Double data Rate architecture: two data transfers per clock cycle
Elite Semiconductor Mem...	M13L2561616A-2A	1Mb/49P	Double-data-rate architecture, two data transfers per clock cycle
Winbond	W972GG6JB-25	1Mb/87P	Double data Rate architecture: two data transfers per clock cycle
Winbond	W9725G6JB25I	1Mb/86P	Double data Rate architecture: two data transfers per clock cycle
Elite Semiconductor Mem...	M13S64164A-2Y	1Mb/49P	Double-data-rate architecture, two data transfers per clock cycle
	M13S128168A-2N	720Kb/49P	Double-data-rate architecture, two data transfers per clock cycle
	M14D128168A	786Kb/59P	Internal pipelined Double-data-rate architecture; two data access per clock cycle
	M14D5121632A-2K	753Kb/64P	Internal pipelined Double-data-rate architecture; two data access per clock cycle
	M14D1G1664A-2D	724Kb/64P	Internal pipelined Double-data-rate architecture; two data access per clock cycle
	M14D1G1664A-2S	707Kb/65P	Internal pipelined Double-data-rate architecture; two data access per clock cycle
	M14D2561616A-2E	1Mb/61P	Internal pipelined Double-data-rate architecture; two data access per clock cycle
	M14D128168A-2M	1,023Kb/59P	Internal pipelined Double-data-rate architecture; two data access per clock cycle