Manufacturer | Part # | Datasheet | Description |
National Semiconductor ...
|
11C70 |
149Kb/6P |
MASTER-SLAVE D-TYPE FLIP-FLOP |
CD4027BM |
125Kb/6P |
Dual J-K Master/Slave Flip-Flop with Set and Reset |
DM54107 |
78Kb/3P |
DUAL MASTER-SLAVE J-K FLIP-FLOPS WITH CLEAR AND COMPLEMENTARY OUTPUTS |
DM54L73 |
88Kb/4P |
Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
DM5476 |
108Kb/4P |
Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs |
DM54L72 |
89Kb/4P |
AND-Gated Master-Slave J-K Flip-Flop with Preset, Clear and Complementary Outputs |
DM54LS107A |
119Kb/6P |
Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
DM54LS73A |
91Kb/3P |
DUAL NEGATIVE-EDGE-TRIGGERED MASTER-SLAVE J-K FLIP-FLOPS WITH CLEAR AND COMPLEMENTARY OUTPUTS |
DM54LS73A |
121Kb/6P |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
54LS112 |
102Kb/3P |
DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS |
SCANSTA101 |
641Kb/32P |
Low Voltage IEEE 1149.1 STA Master |
SCANSTA101 |
403Kb/31P |
Low Voltage IEEE 1149.1 STA Master |
54AC174 |
140Kb/8P |
Hex D Flip-Flop with Master Reset |
54F174DM |
166Kb/8P |
Hex D Flip-Flop with Master Reset |
PC87415 |
374Kb/42P |
PCI-IDE DMA Master Mode Interface Controller |
DP83640 |
91Kb/4P |
Synchronizing a DP83640 PTP Master to a GPS Receiver |