OUTPUTS Datasheet(PDF) - ADCLK846_17

Manufacturer	Part #	Datasheet	Description
Analog Devices	ADCLK846	468Kb/15P	1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer
	AN-759	119Kb/4P	Expanding the Number of DAC Outputs on the ADuC8xx and ADuC702x Families REV. 0
	AD9523BCPZ	879Kb/60P	Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs REV. C
	ADCLK846	524Kb/16P	1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer REV. A
	AD9510	1Mb/56P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
	AD9510	886Kb/56P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs REV. B
	AD9511	1Mb/60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs REV. A
	AD9510	597Kb/60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs REV. A
	AD9511	1Mb/60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs REV. A
	AD9512BCPZ	967Kb/48P	1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs REV. A
	AD9512	125Kb/2P	800 MHz Clock Distribution IC,1.5 GHz Inputs, Dividers, Delay Adjust, Five Outputs Rev. PrA
	ADV7190	628Kb/69P	Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs REV. 0
	ADP5072	646Kb/24P	1 A/0.6 A DC to DC Switching Regulator Independent Positive and Negative Outputs
	CN-0232	246Kb/6P	Minimizing Spurious Outputs Using a Synthesizer with an Integrated VCO and an External PLL Circuit REV. 0
	ADP5076	715Kb/23P	2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs Rev. A
	CN-0294	427Kb/5P	Increasing the Number of Outputs from a Clock Source Using Low Jitter LVPECL Fanout Buffers REV. 0
	MAX77675	4Mb/64P	Low IQ SIMO PMIC with 0.5V to 5.5V Outputs Delivering Up to 700mA Total Output Current Rev 0; 03/23

OUTPUTS Datasheet, PDF

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