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SRAM Datasheet, PDF

Search Description : 'SRAM' - Total: 520 (1/26) Pages
Electronic ManufacturerPart NumberDatasheetElectronics Description

Cypress Semiconductor
CY7C1212F 1-Mbit (64K x 18) Pipelined Sync SRAM
CY7C1297H 1-Mbit (64K x 18) Flow-Through Sync SRAM
CY7C1484V33 2M x 36/4M x 18 Pipelined DCD SRAM
CY7C1354A 256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture
CY7C1481BV25_13 72-Mbit (2 M x 36) Flow-Through SRAM
CY7C1471BV25_11 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Flow-Through SRAM with NoBL Architecture
CY7C1471V33_12 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture
CY7C1516KV18_09 72-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1333 64Kx32 Flow-Thru SRAM with NoBL™ Architecture
CY7C1261V18 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1325G_12 4-Mbit (256 K × 18) Flow-Through Sync SRAM
CY7C1328G_12 4-Mbit (256 K × 18) Pipelined DCD Sync SRAM
CY7C1311BV18_11 18-Mbit QDR™-II SRAM 4-Word Burst Architecture
CY7C4122KV13 144-Mbit QDR™-IV XP SRAM
CY7C1522AV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1418KV18_12 36-Mbit DDR II SRAM Two-Word Burst Architecture
CY7C1484BV33 72-Mbit (2 M × 36) Pipelined DCD Sync SRAM
CY7C1261KV18 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C21701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
CY7C1566V18 72-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)

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